Projects - Clock scaling
Clock and voltage scaling for the SA-1100
Clock scaling allows you to change the clock speed of the running CPU on the fly. This is a nice method to save battery power, because the lower the clock speed, the less power the CPU consumes. Because the clock scaling is integrated in the CPU, all SA-1100 and SA-1110 systems support clock scaling (though it needs some work in the kernel driver).
Voltage scaling is a mean to save even more power, because the lower the clock speed, the lower the CPU core voltage can be. Some LARTs have a little extra hardware to change the CPU core voltage on the fly.
Johan has written a couple of nice papers about clock and voltage scaling:
Johan has some other nice papers on his homepage, and also software that implements the userland policy for clock scaling.
Erik did a Cpufreq overview paper at the 2002 Ottawa Linux Symposium.
Johan is currently working on the userland policy (and writing his Ph.D. thesis). Erik maintains the SA-1100 driver, Russell King developed the generic framework and maintains SA-1110 support, support for AMD K6-2+/3+, AMD Athlon Powernow, Intel SpeedStep, and VIA/Cyrix C3 is being done by Dave Jones and Arjan van de Ven. Domonik Brodowski did the SpeedStep and ACPI drivers and maintains the cpufreq technical pages.