In 1998, the researchers of the MMC project found they had a need for a small, powerful computer board that could be used in experiments with wireless multimedia. The board would have to be low-power and inexpensive, as the project would need several of them. As no off-the-shelf solution that offered an acceptable compromise could be found, a new design was made.

What's on the mainboard?

Here are the LART mainboard specs in short:

220 MHz Digital SA-1100 StrongARM CPU
32 Mbyte EDO RAM
4 MB Intel Fast boot block Flash memory
Power usage < 1 W
Performance > 200 MIPS

The board can run standalone, booting an OS from Flash. The 4 MB Flash is sufficient for a bootloader, a compressed kernel and a compressed ramdisk. The LART accepts an input voltage between 3.5 and 16 V; the on-board DC-DC converters have an efficiency between 90 and 95%.

Connectors

Almost all signals from the SA-1100 are available on either or both of our external connectors. The first connector offers access to the full 32-bit data bus and all 26 address lines, and is used for high-speed peripherals, with a data rate in excess of 400 MB/s. This connector is SMD with a 0.8 mm pitch. The second connector exports almost all GP (general purpose) I/O pins, and enough of the data/address buses to implement peripherals based on ISA or PCMCIA. As the this connector is through-hole with a 2 mm pitch, this is ideal for connecting to simple homebrew PCBs. Robotics, control and other relatively low-speed devices can be attached to this connector.

Apart from these signal connectors, the LART holds a serial connector that can be configured for either one RS232 link with hardware handshake or two links without handshake. A reset connector is included for obvious reasons; through the JTAG connector is it possible to program the on-board Flash. The connector roundup is finished with a voltage/current measurement point and a power connector.

Schematics

Lots of people asked for them, so here they are:

Lart-rev-4.pdf	22 May 2000 22:09:37	336,397 bytes
The schematics for revision 4 of the LART main board, released under the LART hardware license (pdf). The only differences between Rev 3 and Rev 4 are the power supply, and pullup resistors on nPWAIT and nIOIS16.

Lart-rev-3.pdf	20 Mar 2000 16:26:11	328,172 bytes
The schematics for revision 3 of the LART main board, released under the LART hardware license (pdf).

Hardware distribution

Build your own LART using the hardware distribution!

LARTdist-1.0.tar.gz	10 Oct 2000 21:59:46	487,744 bytes
Version 1.0 of the hardware distribution describing revision 4 of the LART main board. Here's a quick link to the README. This archive includes all CAD files that you need to produce a PCB. Released under the LART hardware license (tar, gz)

LARTdist-0.95.tar.gz	20 Mar 2000 02:00:11	559,346 bytes
Version 0.95 of the hardware distribution describing revision 3 of the LART main board. Here's a quick link to the README. This archive includes all CAD files that you need to produce a PCB. Released under the LART hardware license (tar, gz)

Status

The mainboard has proven to be stable.

Pictures

Pictures of the mainboard are available in l'Art gallery.

22 Apr 2000